In a current data center server, a dynamic random access memory (DRAM) is generally used as a memory of the server. However, more than 50% of power consumption of the DRAM is generated by the DRAM itself, and is referred to as background power consumption. That is, even though the DRAM is in an idle state, more than 50% of energy is consumed.
Generally, background power consumption of a DRAM includes refresh power consumption of the DRAM and power consumption of a peripheral circuit.
In a DRAM, each memory cell includes one metal oxide semiconductor (MOS) transistor and one capacitor. An external power source supplies power to each memory cell, to store data. Because an electric charge stored in the capacitor leaks through the MOS transistor after a period of time, a circuit needs to be refreshed periodically to supplement the capacitor with charges, so as to maintain the data stored in the cell.
Generally, the DRAM refreshes the circuit by using an external clock. In this way, a refresh speed is relatively fast, but relatively more power is consumed. In the prior art, to reduce power consumption, after a server enters a power saving mode, the DRAM enters a self-refreshing state. That is, the DRAM refreshes the circuit by using a clock of the DRAM, instead of using an external clock. Therefore, background power consumption generated by the DRAM may be reduced.
However, during self-refreshing, the DRAM still needs to refresh all memory banks. In addition, a peripheral circuit of the DRAM needs to be always in a working state. Therefore, even though the server is in the power saving mode, the power consumption generated by the DRAM is still relatively high.